enable_periph_id_2 (PL390) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

enable_periph_id_2 (PL390) Register Description

Register Nameenable_periph_id_2
Offset Address0x0000000FD8
Absolute Address 0x00F9000FD8 (RCPU_GIC)
Width 8
TyperoRead-only
Reset Value0x0000001B
DescriptionThe periph_id_[8:0] Registers provide information about the
configuration of the peripheral. Note some fields span across
adjacent registers.

enable_periph_id_2 (PL390) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
revision 7:4roRead-only0x1Identifies the architecture version of the GIC. This field is set
to 0x1.
jedec_used 3roRead-only0x1This bit always reads back as 0x1.
jep106_id_6_4 2:0roRead-only0x3These bits read back as b011 because Arm is the designer of this
peripheral.