IOU_SCNTRS Module - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

IOU_SCNTRS Module Description

Module NameIOU_SCNTRS Module
Modules of this TypeIOU_SCNTRS
Base Addresses 0x00FF260000 (IOU_SCNTRS)
DescriptionSystem Timestamp Generator - Secure

IOU_SCNTRS Module Register Summary

Register NameOffset AddressWidthTypeReset ValueDescription
counter_control_register0x000000000032mixedMixed types. See bit-field details.0x00000000Controls the counter increments. This register is not accessible to the read-only programming interface.
counter_status_register0x000000000432mixedMixed types. See bit-field details.0x00000000Identifies the status of the counter. This register is not accessible to the read-only programming interface.
current_counter_value_lower_register0x000000000832rwNormal read/write0x00000000Reads or writes the lower 32 bits of the current counter value. The read-only programming interface can read but not write to this register. The control interface must clear the CNTCR.EN bit before writing to this register.
current_counter_value_upper_register0x000000000C32rwNormal read/write0x00000000Reads or writes the upper 32 bits of the current counter value. The read-only programming interface can read but not write this register. The control interface must clear the CNTCR.EN bit before writing to this register.
base_frequency_ID_register0x000000002032rwNormal read/write0x00000000Program this register to match the clock frequency of the timestamp generator, in ticks per second. For example, for a 50 MHz clock, program 0x02FAF080. This register is not accessible to the read-only programming interface.