reg_admaerrsts (SDIO) Register Description
Register Name | reg_admaerrsts |
---|---|
Offset Address | 0x0000000054 |
Absolute Address |
0x00FF160054 (SD0) 0x00FF170054 (SD1) |
Width | 8 |
Type | roRead-only |
Reset Value | 0x00000000 |
Description | SDIO ADMA Error State and Address. |
When the ADMA Error interrupt occur, the ADMA State in ADMA Error States field and ADMA System Address are stored here. Holds address around the error descriptor. Read-only.
reg_admaerrsts (SDIO) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
admaerrsts_admalenmismatcherr | 2 | roRead-only | 0x0 | ADMA errors detected; occurs in the following 2 cases. 1) While the Block Count Enable being set, the total data length specified by the Descriptor table is different from that specified by the Block Count and Block Length. 2) Total data length can not be divided evenly by the block length. 1: Error 0: No Error |
admaerrsts_admaerrorstate | 1:0 | roRead-only | 0x0 | State of ADMA when an error occurred during an ADMA data transfer. D01 - D00: ADMA Error State when error occurred Contents of SYS_SDR register. 00: ST_STOP (Stop DMA) Points to next of the error descriptor. 01: ST_FDS (Fetch Descriptor)Points to the error descriptor. 10: reserved (ADMA never stops in this state). 11: ST_TFR (Transfer Data) Points to the next error descriptor. |