SMMU_DBGRPTRTBU (SMMU500) Register Description
| Register Name | SMMU_DBGRPTRTBU |
|---|---|
| Offset Address | 0x0000000080 |
| Absolute Address | 0x00FD800080 (SMMU_GPV) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Address of TLB entry in a specific TBU. |
SMMU_DBGRPTRTBU (SMMU500) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| TBU_ID | 26:24 | rwNormal read/write | 0x0 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |
| TLB_Pointer | 15:4 | rwNormal read/write | 0x0 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |
| TLB_Entry_Pointer | 3:0 | rwNormal read/write | 0x0 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |