ATTR_26 (PCIE_ATTRIB) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ATTR_26 (PCIE_ATTRIB) Register Description

Register NameATTR_26
Offset Address0x0000000068
Absolute Address 0x00FD480068 (PCIE_ATTRIB)
Width32
TyperwNormal read/write
Reset Value0x00003000
DescriptionATTR_26

This register should only be written to during reset of the PCIe block

ATTR_26 (PCIE_ATTRIB) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr_dev_cap_enable_slot_pwr_limit_value13rwNormal read/write0x1Permits captured Slot Power Limit Scale Messages to program corresponding Device Capabilities Value field (Upstream Ports only). If set to 0, this field will be hardwired to 0.
attr_dev_cap_enable_slot_pwr_limit_scale12rwNormal read/write0x1Permits captured Slot Power Limit Scale Messages to program corresponding Device Capabilities Scale field (Upstream Ports only). If set to 0, this field will be hardwired to 0.