Baud_rate_divider (UART) Register Description
| Register Name | Baud_rate_divider |
|---|---|
| Offset Address | 0x0000000034 |
| Absolute Address |
0x00FF000034 (UART0) 0x00FF010034 (UART1) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x0000000F |
| Description | Baud Rate Divider Register |
The baud rate divider register controls how much baud_sample is divided by to generate the baud rate clock enables, baud_rx_rate and baud_tx_rate.
Baud_rate_divider (UART) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:8 | roRead-only | 0x0 | Reserved, read as zero, ignored on write. |
| BDIV | 7:0 | rwNormal read/write | 0xF | Baud rate divider value: 0 - 3: ignored 4 - 255: Baud rate |