idr (IOU_SLCR) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2025-06-20
Revision
1.11

idr (IOU_SLCR) Register Description

Register Nameidr
Offset Address0x000000070C
Absolute Address 0x00FF18070C (IOU_SLCR)
Width 1
TypewoWrite-only
Reset Value0x00000000
DescriptionAddress Decode Error Interrupt Disable

A write of one to this location will mask the address decode error interrupt. (IMR: 1)

idr (IOU_SLCR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
addr_decode_err 0woWrite-only0x0Mask for an address decode error interrupt.
0: no effect.
1: Sets mask register, imr to a 1.