MASTER_ID12 (XPPU) Register Description
| Register Name | MASTER_ID12 |
|---|---|
| Offset Address | 0x0000000130 |
| Absolute Address | 0x00FF980130 (LPD_XPPU) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Master Profile 12. Any master; programmable. |
Refer to MASTER_ID00 for more information.
MASTER_ID12 (XPPU) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| MIDP | 31 | rwNormal read/write | 0x0 | Parity protection for [MIDR], [MIDM] and [MID]. |
| MIDR | 30 | rwNormal read/write | 0x0 | Allow only read transactions. 0: read or write okay. 1: read transactions only. |
| Reserved | 29:26 | roRead-only | 0x0 | reserved |
| MIDM | 25:16 | rwNormal read/write | 0x0 | Master ID mask. Applied to transaction Master ID and [MID] bit field. |
| Reserved | 15:10 | roRead-only | 0x0 | reserved |
| MID | 9:0 | rwNormal read/write | 0x0 | Master ID; subject to [MIDM] mask. Predefined value may be changed to profile another master or set of masters. |