ATTR_3 (PCIE_ATTRIB) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ATTR_3 (PCIE_ATTRIB) Register Description

Register NameATTR_3
Offset Address0x000000000C
Absolute Address 0x00FD48000C (PCIE_ATTRIB)
Width32
TyperwNormal read/write
Reset Value0x00000140
DescriptionATTR_3

This register should only be written to during reset of the PCIe block

ATTR_3 (PCIE_ATTRIB) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr_aer_base_ptr11:0rwNormal read/write0x140Byte address of the base of the AER Capability Structure. Any access to this structure (via either the link or the management port) is relative to this address.