MBIST_SETUP (PMU_LOCAL) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

MBIST_SETUP (PMU_LOCAL) Register Description

Register NameMBIST_SETUP
Offset Address0x0000000374
Absolute Address 0x00FFD60374 (PMU_LOCAL)
Width 2
TyperwNormal read/write
Reset Value0x00000000
DescriptionThis register is used to control the SETUP_1 signal to the MBIST Memory Controllers for PMU and CSU

MBIST_SETUP (PMU_LOCAL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
CSU 1rwNormal read/write0x0Controls the SETUP_1 to the CSU MBIST controller
PMU 0rwNormal read/write0x0Controls the SETUP_1 to the PMU MBIST controller