Glitch_Filter (I2C) Register Description
| Register Name | Glitch_Filter |
|---|---|
| Offset Address | 0x000000002C |
| Absolute Address |
0x00FF02002C (I2C0) 0x00FF03002C (I2C1) |
| Width | 16 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000005 |
| Description | Glitch Filter Control Register It is used for setting the length of the glitch filter shift register. If the length of glitch filter shift register is set to zero (0x0) then the glitch filter is bypassed. |
Glitch_Filter (I2C) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 15:4 | roRead-only | 0x0 | Reserved, read as zero, ignored on write. |
| GF | 3:0 | rwNormal read/write | 0x5 | Length of the glitch filter shift register. The filter length is specified in terms of APB interface clock cycles (LPD_LSBUS). The default value is 5. If it is set to zero (0x0) then the glitch filter is bypassed. |