DIRM_3 (GPIO) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

DIRM_3 (GPIO) Register Description

Register NameDIRM_3
Offset Address0x00000002C4
Absolute Address 0x00FF0A02C4 (GPIO)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionDirection mode (GPIO Bank3, EMIO Bank0)

This register operates in exactly the same manner as DIRM_0, except that it reflects bank3, which corresponds to EMIO[31:0].

DIRM_3 (GPIO) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
DIRECTION_331:0rwNormal read/write0x0Direction mode
0: input
1: output
Each bit configures the corresponding pin within the 32-bit bank