PIT0_COUNTER (PMU_IOMODULE) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2025-06-20
Revision
1.11

PIT0_COUNTER (PMU_IOMODULE) Register Description

Register NamePIT0_COUNTER
Offset Address0x0000000044
Absolute Address 0x00FFD40044 (PMU_IOMODULE)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionPIT0 Counter Register

When reading this register the data obtained is a sample of the current counter value.

PIT0_COUNTER (PMU_IOMODULE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
PIT0_COUNTER31:0roRead-only0x0PIT0 counter value at time of read