OEN_3 (GPIO) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

OEN_3 (GPIO) Register Description

Register NameOEN_3
Offset Address0x00000002C8
Absolute Address 0x00FF0A02C8 (GPIO)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionOutput enable (GPIO Bank3, EMIO Bank0)

This register operates in exactly the same manner as OEN_0, except that it reflects bank3, which corresponds to EMIO[31:0].

OEN_3 (GPIO) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
OP_ENABLE_331:0rwNormal read/write0x0Output enables
0: disabled
1: enabled
Each bit configures the corresponding pin within the 26-bit bank