Slave_Idle_count (SPI) Register Description
| Register Name | Slave_Idle_count |
|---|---|
| Offset Address | 0x0000000024 |
| Absolute Address |
0x00FF040024 (SPI0) 0x00FF050024 (SPI1) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x000000FF |
| Description | Slave Idle Count |
Slave_Idle_count (SPI) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:8 | roRead-only | 0x0 | Reserved, read as zero, ignored on write. |
| Slave_Idle_coun | 7:0 | rwNormal read/write | 0xFF | SPI in slave mode detects a start only when the external SPI master serial clock (sclk_in) is stable (quiescent state/when the Clock is inactive ) for SPI REFERENCE CLOCK cycles specified by slave idle count register or when the SPI is deselected. Change only when controller is not actively transmitting or receiving data. |