GPO2 (PMU_IOMODULE) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2025-06-20
Revision
1.11

GPO2 (PMU_IOMODULE) Register Description

Register NameGPO2
Offset Address0x0000000018
Absolute Address 0x00FFD40018 (PMU_IOMODULE)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionPMU Acknowlegements (GPO2)

PMU-generated requests and acknowledges

GPO2 (PMU_IOMODULE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:10razRead as zero0x0reserved
DAP_RPU_WAKE_ACK 9woWrite-only0x0Acknowledge to RPU Wake-up request from DAP
DAP_FP_WAKE_ACK 8woWrite-only0x0Acknowledge to FP Wake-up request from DAP
PS_STATUS 7woWrite-only0x0PS_STATUS to dedicated GPO
PCAP_EN 6woWrite-only0x0Instructs CSU to enable the PCAP Gasket
Reserved 5:0razRead as zero0x0reserved

This register holds the value that will be driven to the corresponding bits in the I/O Module GPO3 port output signals.
All bits are in the register are updated when the register is written.