SMMU_CB6_TLBIIPAS2_high (SMMU500) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

SMMU_CB6_TLBIIPAS2_high (SMMU500) Register Description

Register NameSMMU_CB6_TLBIIPAS2_high
Offset Address0x0000016634
Absolute Address 0x00FD816634 (SMMU_GPV)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionInvalidates all unlocked TLB entries that match the IPA provided

SMMU_CB6_TLBIIPAS2_high (SMMU500) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Address 3:0woWrite-only0x0Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details