EFUSE_RD_ADDR (EFUSE) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2025-06-20
Revision
1.11

EFUSE_RD_ADDR (EFUSE) Register Description

Register NameEFUSE_RD_ADDR
Offset Address0x0000000010
Absolute Address 0x00FFCC0010 (EFUSE)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptioneFuse Read Address

EFUSE_RD_ADDR (EFUSE) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
EFUSE12:11woWrite-only0x0Type of eFuse to read from.
0: Main eFuse array.
1: reserved
2: PUF Syndrome data (LSB).
3: PUF Syndrome data (MSB).
ROW10:5woWrite-only0x0eFuse row address
Reserved 4:0wazWrite as zero0x0Reserved - The eFuse will read an entire 32-bit row at a time.