ACPU0_PWR_STATUS (PMU_LOCAL) Register Description
| Register Name | ACPU0_PWR_STATUS |
|---|
| Offset Address | 0x0000000004 |
|---|
| Absolute Address |
0x00FFD60004 (PMU_LOCAL)
|
|---|
| Width | 32 |
|---|
| Type | roRead-only |
|---|
| Reset Value | 0x0000000F |
|---|
| Description | APU Core 0 Power Status. Reset by POR only. |
|---|
Status of the power switch gates. 0: off. 1: on, ready. All fields are read-only and are accessible only by the PMU processor. This register maintains its contents during a System Reset.
ACPU0_PWR_STATUS (PMU_LOCAL) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| Reserved | 31:4 | roRead-only | 0x0 | reserved |
| Pwr_Gates | 3:0 | roRead-only | 0xF | Status of power switch gates {0:3} for APU core 0. |