BOOT_STAGE (PMU_LOCAL) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

BOOT_STAGE (PMU_LOCAL) Register Description

Register NameBOOT_STAGE
Offset Address0x0000000304
Absolute Address 0x00FFD60304 (PMU_LOCAL)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionPMU Boot Stage and General Purpose Read-Write.

During boot, this register holds a code specify which stage in boot the PMU is currently in. After boot, this register can be used by the Firmware as a general storage register. Its contents are not modified or used by the PMU ROM after handoff to the Firmware.

BOOT_STAGE (PMU_LOCAL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reg31:0rwNormal read/write0x00000_0000 h: PMU ROM Pre-boot Initialization
0000_0001 h: ScanClean of the LPD and FPD
0000_0002 h: PS SysMon Initialization
0000_0004 h: IOPLL and DPLL Lock Acquisition Begin
0000_0008 h: PMU_RAM and CSU_RAM Zeroization
0000_0010 h: IOPLL and DPLL Lock Check and MBIST Clk Configuration
0000_0020 h: Check VCC_PSINTLP, VCC_AUX, and VCC_PSIO3 Supply Voltages
0000_0040 h: BISR Clear FPD Domain
0000_0080 h: BIST Clear LPD and FPD Domains
0000_0100 h: Power Down Disabled IP
0000_0200 h: Release CSU
0000_0400 h: Enter PMU ROM Serivce Mode
FFFF_FFFF h: Boot Complete