L2_RET_CNTRL (PMU_LOCAL) Register Description
| Register Name | L2_RET_CNTRL |
|---|
| Offset Address | 0x00000000B4 |
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| Absolute Address |
0x00FFD600B4 (PMU_LOCAL)
|
|---|
| Width | 32 |
|---|
| Type | mixedMixed types. See bit-field details. |
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| Reset Value | 0x00000000 |
|---|
| Description | L2 Cache Memory Retention Controls. Reset only by POR. |
|---|
Retention control signal. 0: active memory. 1: data retention mode. All fields can only be read or written by the PMU processor. This register maintains its contents during a System Reset.
L2_RET_CNTRL (PMU_LOCAL) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| Reserved | 31:1 | roRead-only | 0x0 | reserved |
| Bank0 | 0 | rwNormal read/write | 0x0 | Retention control for the L2 cache. |