BOOT_PIN_CTRL (CRL_APB) Register Description
| Register Name | BOOT_PIN_CTRL |
|---|---|
| Offset Address | 0x0000000250 |
| Absolute Address | 0x00FF5E0250 (CRL_APB) |
| Width | 16 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Used to control the mode pins after boot. |
BOOT_PIN_CTRL (CRL_APB) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 15:12 | rwNormal read/write | 0x0 | reserved |
| out_val | 11:8 | rwNormal read/write | 0x0 | Value driven onto the mode pins, when out_en = 1 |
| in_val | 7:4 | roRead-only | 0x0 | Value captured from the mode pins |
| out_en | 3:0 | rwNormal read/write | 0x0 | When 0, the pins will be inputs from the board to the PS. When 1, the PS will drive these pins |