PP0_TIEBREAK_MODE (GPU) Register Description
| Register Name | PP0_TIEBREAK_MODE |
|---|---|
| Offset Address | 0x000000804C |
| Absolute Address | 0x00FD4B804C (GPU) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Tiebreak mode Register |
PP0_TIEBREAK_MODE (GPU) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:3 | rwNormal read/write | 0x0 | Reserved, write as zero, read undefined. |
| TIEBREAK_MODE | 2:0 | rwNormal read/write | 0x0 | Selects how the rasterizer breaks ties when a polygon edge is at a sample point. |