OCM_CE_CNTRL (PMU_LOCAL) Register Description
| Register Name | OCM_CE_CNTRL |
| Offset Address | 0x00000000C8 |
| Absolute Address |
0x00FFD600C8 (PMU_LOCAL)
|
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x0000000F |
| Description | OCM Memory Chip Enables. Reset only by POR. |
Chip Enable control signals. 0: disable memory. 1: enable memory. All fields can be read or written only by the PMU processor. This register maintains its contents during a System Reset.
OCM_CE_CNTRL (PMU_LOCAL) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
| Reserved | 31:4 | roRead-only | 0x0 | reserved |
| Bank3 | 3 | rwNormal read/write | 0x1 | OCM Bank 3 |
| Bank2 | 2 | rwNormal read/write | 0x1 | OCM Bank 2 |
| Bank1 | 1 | rwNormal read/write | 0x1 | OCM Bank 1 |
| Bank0 | 0 | rwNormal read/write | 0x1 | OCM Bank 0 |