PP1_MMU_DTE_ADDR (GPU) Register Description
| Register Name | PP1_MMU_DTE_ADDR |
|---|---|
| Offset Address | 0x0000005000 |
| Absolute Address | 0x00FD4B5000 (GPU) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | MMU Current Page Table Address Register |
PP1_MMU_DTE_ADDR (GPU) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| MMU_DTE_ADDR | 31:0 | rwNormal read/write | 0x0 | Page table address |