MBISR_STATUS (PMU_LOCAL) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

MBISR_STATUS (PMU_LOCAL) Register Description

Register NameMBISR_STATUS
Offset Address0x0000000334
Absolute Address 0x00FFD60334 (PMU_LOCAL)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionCompletion Status of MBISR engines.

MBISR_STATUS (PMU_LOCAL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:5roRead-only0x0reserved
Pass 4roRead-only0x0When Done is 1, this bit reflects the completion status of the MBISR.
0: failed.
1: passed.
Reserved 3:1roRead-only0x0reserved
Done 0roRead-only0x0If this bit is 1, the MBISR engine that is started, has completed its operation.