UE_FFE (PMU_LMB_BRAM) Register Description
| Register Name | UE_FFE |
|---|
| Offset Address | 0x0000000280 |
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| Absolute Address |
0x00FFD50280 (PMU_LMB_RAM)
|
|---|
| Width | 32 |
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| Type | mixedMixed types. See bit-field details. |
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| Reset Value | 0x00000000 |
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| Description | Uncorrectable Error First Failing ECC |
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This register stores the ECC of the first occurrence of an access with a uncorrectable error. When the UE_STATUS bit in the ECC Status Register is cleared, this register is re-enabled to store the ECC of the next uncorrectable error. Storing of the failing ECC is enabled after reset.
UE_FFE (PMU_LMB_BRAM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| Reserved | 31:8 | razRead as zero | 0x0 | reserved |
| ue_ffe | 7:0 | roRead-only | 0x0 | ECC of the first occurrence of an uncorrectable error |