ATTR_98 (PCIE_ATTRIB) Register Description
| Register Name | ATTR_98 |
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| Offset Address | 0x0000000188 |
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| Absolute Address |
0x00FD480188 (PCIE_ATTRIB)
|
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| Width | 32 |
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| Type | rwNormal read/write |
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| Reset Value | 0x0000FFFF |
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| Description | ATTR_98 |
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This register should only be written to during reset of the PCIe block
ATTR_98 (PCIE_ATTRIB) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| attr_n_fts_comclk_gen2 | 15:8 | rwNormal read/write | 0xFF | Sets the number of FTS sequences advertised in the TS1 Ordered Sets when the Link Configuration register shows that a common clock source is selected (used for all lanes when operating at 5.0 GT/s) |
| attr_n_fts_comclk_gen1 | 7:0 | rwNormal read/write | 0xFF | Sets the number of FTS sequences advertised in the TS1 Ordered Sets when the Link Configuration register shows that a common clock source is selected (used for all lanes when operating at 2.5 GT/s) |