PP1_WATCHDOG_DISABLE (GPU) Register Description
| Register Name | PP1_WATCHDOG_DISABLE |
|---|---|
| Offset Address | 0x000000B060 |
| Absolute Address | 0x00FD4BB060 (GPU) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Watchdog Disable Register |
PP1_WATCHDOG_DISABLE (GPU) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:1 | rwNormal read/write | 0x0 | Reserved, write as zero, read undefined. |
| _ | 0 | rwNormal read/write | 0x0 | Watchdog value |