GEVNTSIZ_2 (USB3_XHCI) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

GEVNTSIZ_2 (USB3_XHCI) Register Description

Register NameGEVNTSIZ_2
Offset Address0x000000C428
Absolute Address 0x00FE20C428 (USB3_0_XHCI)
0x00FE30C428 (USB3_1_XHCI)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionGlobal Event Buffer Size Register
This register holds the Event Buffer Size and the Event Interrupt Mask bit. During power-on initialization, software must initialize the size with the number of bytes allocated for the Event Buffer. The Event Interrupt Mask will mask the interrupt, but events are still queued. After configuration, software must preserve the Event Buffer Size value when changing the Event Interrupt Mask. Instance 2 of an array of 4.

GEVNTSIZ_2 (USB3_XHCI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
EVNTINTRPTMASK31rwNormal read/write0Event Interrupt Mask (EvntIntMask).
When set to 1, this prevents the interrupt from being generated. However, even when the mask is set, the events are queued.
Reserved30:16roRead-only0x0Reserved
EVENTSIZ15:0rwNormal read/write0Event Buffer Size in bytes (EVNTSiz)
Holds the size of the Event Buffer in bytes; must be a multiple of four. This is programmed by software once during initialization.
The minimum size of the event buffer is 32 bytes.