reg_admasysaddr0 (SDIO) Register Description
| Register Name | reg_admasysaddr0 |
|---|---|
| Offset Address | 0x0000000058 |
| Absolute Address |
0x00FF160058 (SD0) 0x00FF170058 (SD1) |
| Width | 16 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Lower physical address for ADMA data transfer. |
The 32-bit Address Descriptor uses lower 32-bit of this register. To setup an ADMA transfer, the Host Driver sets the start address of the Descriptor table. Each time a descriptor line is fetched, the ADMA increments this register address in order to point to next descriptor line. When the ADMA Error Interrupt is generated, this register holds the valid Descriptor address depending on the ADMA state. The Host Driver programs the Descriptor Table on 32-bit boundaries and a 32-bit boundary address to this register. The ADMA2 ignores lower 2-bit of this register and assumes it to be 00b.
reg_admasysaddr0 (SDIO) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| adma_sysaddress0 | 15:0 | rwNormal read/write | 0x0 | Descriptor table byte address of executing command. |