GEVNTADRHI_0 (USB3_XHCI) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

GEVNTADRHI_0 (USB3_XHCI) Register Description

Register NameGEVNTADRHI_0
Offset Address0x000000C404
Absolute Address 0x00FE20C404 (USB3_0_XHCI)
0x00FE30C404 (USB3_1_XHCI)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionGlobal Event Buffer Address (High) Register
This is an alternate register for the GEVNTADRn register. Instance 0 of an array of 4.

GEVNTADRHI_0 (USB3_XHCI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
EVNTADRHI31:0rwNormal read/write0x0Event Buffer Address (EvntAdrHi)
Holds the higher 32 bits of start address of the external memory for the Event Buffer. During operation, hardware does not update this address.