CSUDMA_SRC_ADDR (CSUDMA) Register Description
| Register Name | CSUDMA_SRC_ADDR |
|---|---|
| Offset Address | 0x0000000000 |
| Absolute Address | 0x00FFC80000 (CSUDMA) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Source mem address (lsbs) for DMA memory->stream data transfer |
CSUDMA_SRC_ADDR (CSUDMA) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| ADDR | 31:2 | rwNormal read/write | 0x0 | Source memory address (lsbs) for DMA memory->stream data transfer Address is word aligned, so this field is only 30-bits. (2 lsbs are 0) This field must be written initially before a DMA operation is started. In this case, it indicates the memory start address (lsbs) the DMA will begin fetching from. After the DMA has started, this field will dynamically change under DMA control to reflect the current memory source address that is being processed by the DMA. When a data word is written into the SRC FIFO from memory, ADDR will increment by 1 word. The readback is only valid if Burst Type is INCR (not WRAP) The full 48-bit source address is comprised of this field concatenated with the CSUDMA_SRC_ADDR_MSB field as follows: 48-bit SRC address = {CSUDMA_SRC_ADDR_MSB, ADDR, 2b00} |
| Reserved | 1:0 | razRead as zero | 0x0 | RESERVED. Return 0 when read. Writes ignored. |