CIDR3 (A53_PMU_2) Register Description
| Register Name | CIDR3 |
|---|---|
| Offset Address | 0x0000000FFC |
| Absolute Address | 0x00FEE30FFC (CORESIGHT_A53_PMU_2) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x000000B1 |
| Description | Performance Monitors Component Identification Register 3 |
CIDR3 (A53_PMU_2) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| PRMBL_3 | 7:0 | roRead-only | 0xB1 | Preamble. Must read as 0xB1. |