Field Name | Bits | Type | Reset Value | Description |
Event0x12 | 17 | roRead-only | 0x1 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |
Event0x11 | 16 | roRead-only | 0x1 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |
Event0x10 | 15 | roRead-only | 0x0 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |
Event0x0A | 9 | roRead-only | 0x1 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |
Event0x09 | 8 | roRead-only | 0x1 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |
Event0x08 | 7 | roRead-only | 0x0 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |
Event0x01 | 1 | roRead-only | 0x1 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |
Event0x00 | 0 | roRead-only | 0x1 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |