PP0_WATCHDOG_DISABLE (GPU) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

PP0_WATCHDOG_DISABLE (GPU) Register Description

Register NamePP0_WATCHDOG_DISABLE
Offset Address0x0000009060
Absolute Address 0x00FD4B9060 (GPU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionWatchdog Disable Register

PP0_WATCHDOG_DISABLE (GPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:1rwNormal read/write0x0Reserved, write as zero, read undefined.
_ 0rwNormal read/write0x0Watchdog value