GDMA_RAM (FPD_SLCR) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

GDMA_RAM (FPD_SLCR) Register Description

Register NameGDMA_RAM
Offset Address0x0000003010
Absolute Address 0x00FD613010 (FPD_SLCR)
Width16
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionRAM control register

GDMA_RAM (FPD_SLCR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved15razRead as zero0x0RESERVED. Return 0 when read. Writes ignored.
Reserved 7rwNormal read/write0x0RESERVED. Return 0 when read. Writes ignored.