| Register Name | Offset Address | Width | Type | Reset Value | Description |
|---|
| RPU_GLBL_CNTL | 0x0000000000 | 32 | mixedMixed types. See bit-field details. | 0x00000050 | Global Control Regiter for RPU |
| RPU_GLBL_STATUS | 0x0000000004 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Miscellaneous status information for RPU |
| RPU_ERR_CNTL | 0x0000000008 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Error Response Enable/Disable Register |
| RPU_RAM | 0x000000000C | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Control for extra features of RAMs |
| RPU_ERR_INJ | 0x0000000020 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Reserved for future use |
| RPU_CCF_MASK | 0x0000000024 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Common Cause Signal Mask Register |
| RPU_INTR_0 | 0x0000000028 | 32 | rwNormal read/write | 0x00000000 | RPU Interrupt Injection register |
| RPU_INTR_1 | 0x000000002C | 32 | rwNormal read/write | 0x00000000 | RPU Interrupt Injection register |
| RPU_INTR_2 | 0x0000000030 | 32 | rwNormal read/write | 0x00000000 | RPU Interrupt Injection register |
| RPU_INTR_3 | 0x0000000034 | 32 | rwNormal read/write | 0x00000000 | RPU Interrupt Injection register |
| RPU_INTR_4 | 0x0000000038 | 32 | rwNormal read/write | 0x00000000 | RPU Interrupt Injection register |
| RPU_INTR_MASK_0 | 0x0000000040 | 32 | rwNormal read/write | 0x00000000 | RPU Interrupt Injection Mask register |
| RPU_INTR_MASK_1 | 0x0000000044 | 32 | rwNormal read/write | 0x00000000 | RPU Interrupt Injection Mask register |
| RPU_INTR_MASK_2 | 0x0000000048 | 32 | rwNormal read/write | 0x00000000 | RPU Interrupt Injection Mask register |
| RPU_INTR_MASK_3 | 0x000000004C | 32 | rwNormal read/write | 0x00000000 | RPU Interrupt Injection Mask register |
| RPU_INTR_MASK_4 | 0x0000000050 | 32 | rwNormal read/write | 0x00000000 | RPU Interrupt Injection Mask register |
| RPU_CCF_VAL | 0x0000000054 | 32 | mixedMixed types. See bit-field details. | 0x00000007 | Common Cause Signal Value Register |
| RPU_SAFETY_CHK | 0x00000000F0 | 32 | rwNormal read/write | 0x00000000 | RPU Safety Check Register |
| RPU_0_CFG | 0x0000000100 | 32 | mixedMixed types. See bit-field details. | 0x00000005 | Configuration Parameters specific to RPU0 |
| RPU_0_STATUS | 0x0000000104 | 32 | mixedMixed types. See bit-field details. | 0x0000003F | R5_0 Status Register |
| RPU_0_PWRDWN | 0x0000000108 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Power down request from R5s |
| RPU_0_ISR | 0x0000000114 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Status Register |
| RPU_0_IMR | 0x0000000118 | 32 | mixedMixed types. See bit-field details. | 0x01FFFFFF | Interrupt Mask Register |
| RPU_0_IEN | 0x000000011C | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Enable Register |
| RPU_0_IDS | 0x0000000120 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Disable Register |
| RPU_0_SLV_BASE | 0x0000000124 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Slave Base Address Register |
| RPU_0_AXI_OVER | 0x0000000128 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | RPU 0 AXI Override Register |
| RPU_1_CFG | 0x0000000200 | 32 | mixedMixed types. See bit-field details. | 0x00000005 | Configuration Parameters specific to RPU1 |
| RPU_1_STATUS | 0x0000000204 | 32 | mixedMixed types. See bit-field details. | 0x0000003F | R5_1 Status Register |
| RPU_1_PWRDWN | 0x0000000208 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Power down request from R5s |
| RPU_1_ISR | 0x0000000214 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Status Register |
| RPU_1_IMR | 0x0000000218 | 32 | mixedMixed types. See bit-field details. | 0x01FFFFFF | Interrupt Mask Register |
| RPU_1_IEN | 0x000000021C | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Enable Register |
| RPU_1_IDS | 0x0000000220 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Disable Register |
| RPU_1_SLV_BASE | 0x0000000224 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Slave Base Address Register |
| RPU_1_AXI_OVER | 0x0000000228 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | RPU 1 AXI Override Register |