REQ_PWRDWN_TRIG (PMU_GLOBAL) Register Description
| Register Name | REQ_PWRDWN_TRIG |
|---|
| Offset Address | 0x0000000220 |
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| Absolute Address |
0x00FFD80220 (PMU_GLOBAL)
|
|---|
| Width | 32 |
|---|
| Type | woWrite-only |
|---|
| Reset Value | 0x00000000 |
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| Description | Power-down or RAM Retention Request; Interrupt Trigger. |
|---|
The software request can request a power-down or RAM data retention request. Refer to the RAM_RET_CNTRL register for more information on using this trigger register for RAM retention. Trigger a request. 0: no effect. 1: trigger a power-down or retention request. Write-only.
REQ_PWRDWN_TRIG (PMU_GLOBAL) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| PL | 23 | woWrite-only | 0x0 | Programmable Logic, PL. Controlled by external FET via MIO pin. This optional control uses MIO [32] and is equivalent to PMU signal [6]. |
| FP | 22 | woWrite-only | 0x0 | Full-power Domain, FPD. Controlled by external FET via MIO pin. This optional control uses MIO [31] and is equivalent to PMU signal [5]. |
| USB1 | 21 | woWrite-only | 0x0 | USB controller 1 power-down. |
| USB0 | 20 | woWrite-only | 0x0 | USB controller 0 power-down. |
| OCM_Bank3 | 19 | woWrite-only | 0x0 | OCM Bank 3: power-down or RAM data retention. |
| OCM_Bank2 | 18 | woWrite-only | 0x0 | OCM Bank 2: power-down or RAM data retention. |
| OCM_Bank1 | 17 | woWrite-only | 0x0 | OCM Bank 1: power-down or RAM data retention. |
| OCM_Bank0 | 16 | woWrite-only | 0x0 | OCM Bank 0: power-down or RAM data retention. |
| TCM1B | 15 | woWrite-only | 0x0 | RPU core 1, TCM_B: power-down or RAM data retention. |
| TCM1A | 14 | woWrite-only | 0x0 | RPU core 1, TCM_A: power-down or RAM data retention. |
| TCM0B | 13 | woWrite-only | 0x0 | RPU core 0, TCM_B: power-down or RAM data retention. |
| TCM0A | 12 | woWrite-only | 0x0 | RPU core 0, TCM_A: power-down or RAM data retention. |
| RPU | 10 | woWrite-only | 0x0 | RPU processors: power-down. |
| L2_Bank0 | 7 | woWrite-only | 0x0 | APU L2 Cache: power-down or RAM data retention. |
| PP1 | 5 | woWrite-only | 0x0 | GPU Pixel Processor 1: power-down. |
| PP0 | 4 | woWrite-only | 0x0 | GPU Pixel Processor 0: power-down. |
| ACPU3 | 3 | woWrite-only | 0x0 | APU core 3: power-down. |
| ACPU2 | 2 | woWrite-only | 0x0 | APU core 2: power-down. |
| ACPU1 | 1 | woWrite-only | 0x0 | APU core 1: power-down. |
| ACPU0 | 0 | woWrite-only | 0x0 | APU core 0: power-down. |