ATTR_76 (PCIE_ATTRIB) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ATTR_76 (PCIE_ATTRIB) Register Description

Register NameATTR_76
Offset Address0x0000000130
Absolute Address 0x00FD480130 (PCIE_ATTRIB)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionATTR_76

This register should only be written to during reset of the PCIe block

ATTR_76 (PCIE_ATTRIB) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr_rbar_cap_index414:12rwNormal read/write0x0BAR Index value for Resizable BAR Control Register(4). Set to 0 if 4 or fewer BARs can be resized. This value should not be lower than the value on RBAR_CAP_INDEX0,1,2,3.
attr_rbar_cap_index311:9rwNormal read/write0x0BAR Index value for Resizable BAR Control Register(3). Set to 0 if 3 or fewer BARs can be resized. This value should not be lower than the value on RBAR_CAP_INDEX0,1,2.
attr_rbar_cap_index2 8:6rwNormal read/write0x0BAR Index value for Resizable BAR Control Register(2). Set to 0 if 2 or fewer BARs can be resized. This value should not be lower than the value on RBAR_CAP_INDEX0,1.
attr_rbar_cap_index1 5:3rwNormal read/write0x0BAR Index value for Resizable BAR Control Register(1). Set to 0 if 1 or fewer BARs can be resized. This value should not be lower than the value on RBAR_CAP_INDEX0.
attr_rbar_cap_index0 2:0rwNormal read/write0x0BAR Index value for Resizable BAR Control Register(0). This value must be the lowest BAR Index of the resizable BARs.