enable_periph_id_5 (PL390) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

enable_periph_id_5 (PL390) Register Description

Register Nameenable_periph_id_5
Offset Address0x0000000FE4
Absolute Address 0x00F9000FE4 (RCPU_GIC)
Width 8
TyperoRead-only
Reset Value0x00000010
DescriptionThe periph_id_[8:0] Registers provide information about the
configuration of the peripheral. Note some fields span across
adjacent registers.

enable_periph_id_5 (PL390) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
ppi_number_0 7:5roRead-only0x0The LSBs of the number of PPIs that the GIC provides.
sgi_number 4:0roRead-only0x10The number of SGIs that the GIC provides.
b00000 = no SGIs,
b00001 = one SGI, INTID0,
b00010 = two SGIs, INTID[1:0],
..,
b10000 = 16 SGIs, INTID[15:0],
b10001-b11111 = reserved.