RX_thres (SPI) Register Description
Register Name | RX_thres |
---|---|
Offset Address | 0x000000002C |
Absolute Address |
0x00FF04002C (SPI0) 0x00FF05002C (SPI1) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000001 |
Description | RX FIFO Threshold |
RX_thres (SPI) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Threshold_of_RX_FIFO | 31:0 | rwNormal read/write | 0x1 | Defines the level at which the RX FIFO not empty interrupt is generated Change only when controller is not actively transmitting or receiving data. |