MCU_ADDR_OFFSET_IC0 (VCU_ENC_TOP) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

MCU_ADDR_OFFSET_IC0 (VCU_ENC_TOP) Register Description

Register NameMCU_ADDR_OFFSET_IC0
Offset Address0x0000009010
Absolute Address 0x00A0009010 (VCU_ENCODE)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionMCU Instruction Cache Address Offset 0

MCU_ADDR_OFFSET_IC0 (VCU_ENC_TOP) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
McuICAddrOffset031:0rwNormal read/write0x032 MSBs of the 64-bit address offset used for the MCU instruction cache accesses to the external memory