Mutex3 (LPD_SLCR) Register Description
Register Name | Mutex3 |
---|---|
Offset Address | 0x000000700C |
Absolute Address | 0x00FF41700C (LPD_SLCR) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | LP Domain SLCR Mutex 3 register |
Mutex3 (LPD_SLCR) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
id | 31:0 | rwNormal read/write | 0x0 | SW mutex can be activated by any master by writing its non-zero ID value. Mutex Status: Availibility: When this register is zero means mutex is available for any master. After reset, this mutex is available to any master. Activation: When this mutex is available then any master can occupied by writing non-zero value to this register. Further non-zero writes to this register will be ignored. Deactivation/Release: Mater has to write zero to this register to release this Mutex. |