L1_TM_IQ_ILL9 (SERDES) Register Description
| Register Name | L1_TM_IQ_ILL9 |
|---|---|
| Offset Address | 0x0000005918 |
| Absolute Address | 0x00FD405918 (SERDES) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Register value is generated by Vivado PCW. |
L1_TM_IQ_ILL9 (SERDES) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| TM_IQ_ILL9_31_8_rsvd | 31:8 | roRead-only | 0x0 | Value generated by PCW. |
| UNUSED | 7:4 | roRead-only | 0x0 | Value generated by PCW. |
| ill_bypass_iq_lfen | 3 | rwNormal read/write | 0x0 | Value generated by PCW. |
| ill_bypass_iq_lfen_val | 2 | rwNormal read/write | 0x0 | Value generated by PCW. |
| ill_bypass_iq_cnstgmtrim | 1 | rwNormal read/write | 0x0 | Value generated by PCW. |
| ill_bypass_iq_polytim | 0 | rwNormal read/write | 0x0 | Value generated by PCW. |