enable_targets_spi_INTID38 (PL390) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2025-06-20
Revision
1.11

enable_targets_spi_INTID38 (PL390) Register Description

Register Nameenable_targets_spi_INTID38
Offset Address0x0000000846
Absolute Address 0x00F9000846 (RCPU_GIC)
Width 8
TyperwNormal read/write
Reset Value0x00000000
DescriptionInterrupt Processor Targets Registers (ICDIPTR)

enable_targets_spi_INTID38 (PL390) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_ 7:0rwNormal read/write0x0Refer to the Arm Generic Interrupt Controller Architecture Specification 2.0 for a detailed register descriptions.