SMMU_CB3_ACTLR (SMMU500) Register Description
| Register Name | SMMU_CB3_ACTLR |
|---|---|
| Offset Address | 0x0000013004 |
| Absolute Address | 0x00FD813004 (SMMU_GPV) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000003 |
| Description | The Auxillary Control register provides implementation specific configuration and control options. |
SMMU_CB3_ACTLR (SMMU500) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| CPRE | 1 | rwNormal read/write | 0x1 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |
| CMTLB | 0 | rwNormal read/write | 0x1 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |