RPU_PWR_CNTRL (PMU_LOCAL) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

RPU_PWR_CNTRL (PMU_LOCAL) Register Description

Register NameRPU_PWR_CNTRL
Offset Address0x0000000080
Absolute Address 0x00FFD60080 (PMU_LOCAL)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x0000000F
DescriptionRPU MPCore Power and Isolation Control. Reset by POR only.

Controls the power switch gates and isolation cells. On-chip power Switches: 0: power off. 1: power on. Isolation Control: 0: open border. 1: isolation wall on. All fields can only be read or written by the PMU processor. This register maintains its contents during a System Reset.

RPU_PWR_CNTRL (PMU_LOCAL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:5roRead-only0x0reserved
Isolation 4rwNormal read/write0x0Isolation control for RPU MPCore.
Pwr_Gates 3:0rwNormal read/write0xFControl of power switch gates {0:3} for RPU MPCore.