R05_END (XMPU_OCM) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

R05_END (XMPU_OCM) Register Description

Register NameR05_END
Offset Address0x0000000154
Absolute Address 0x00FFA70154 (OCM_XMPU_CFG)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionRegion 5 End Address.

Refer to R00_END for more information.

R05_END (XMPU_OCM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:20roRead-only0x0reserved
ADDR19:0rwNormal read/write0x0Bits [19:0] correspond to address bits [31:12].