GP_MMU_ZAP_ONE_LINE (GPU) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

GP_MMU_ZAP_ONE_LINE (GPU) Register Description

Register NameGP_MMU_ZAP_ONE_LINE
Offset Address0x0000003010
Absolute Address 0x00FD4B3010 (GPU)
Width32
TypewoWrite-only
Reset Value0x00000000
DescriptionMMU Zap Cache Line Register

GP_MMU_ZAP_ONE_LINE (GPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
MMU_ZAP_ONE_LINE31:0woWrite-only0x0Address to be invalidated from the page table cache